Nuvoton’s NUC140VE3AN is an MCU with full-speed USB 2.0 and CAN functions, embedded Cortex™-M0 core, up to 50MHz, integrated 32K/64K/128K bytes of Flash memory, and 4K/8K /16K bytes of SRAM, 4K bytes of ROM for storing ISP boot code, and 4K bytes of data Flash memory. In addition, there are rich peripherals such as timers, watchdog timers, RTC, PDMA, UART, SPI, I2C, I2S, PWM timers, GPIO, LIN, CAN, PS/2, USB 2.0 FS devices, 12 Bit ADC, analog comparator, low-voltage reset control and under-voltage detection function, mainly used in industrial control, data communication, USB applications and motor control, automotive and consumer products. This article introduces the main features and selection of NuMicro™ NUC140 series Guidelines and block diagrams, as well as the main features of the NuTiny-SDK-NUC140 development board, circuit diagrams and application schematics of the CAN demo board.

NuMicro™ NUC140 Connectivity Line with full-speed USB 2.0 and CAN functions, embedded Cortex™-M0 core, can run up to 50 MHz, built-in 32K/64K/128K bytes of Flash memory, and 4K/8K/16K bytes of SRAM , 4K bytes of ROM for storing ISP boot code, and 4K bytes of data Flash memory. In addition, there are rich peripherals such as timers, watchdog timers, RTC, PDMA, UART, SPI, I2C, I2S, PWM timers, GPIO, LIN, CAN, PS/2, USB 2.0 FS devices, 12 Bit ADC, analog comparator, low voltage reset control and brownout detection function.

NuMicro™ NUC140 main features:

• Kernel
– ARM® Cortex™-M0 core running up to 50 MHz
– A 24-bit system timer
– Support low power sleep mode
– Single-cycle 32-bit hardware multiplier
– Nested Vectored Interrupt Controller (NVIC) for controlling 32 interrupt sources, each of which can be set to 4 priority levels
– Supports Serial Wire Debug (SWD) with 2 watchpoints/4 breakpoints
• Built-in LDO, wide voltage operating range 2.5 V to 5.5 V
• Flash memory
– 32K/64K/128K bytes of Flash for storing program code
– 4KB flash for storing ISP boot code
– Supports in-system programming (ISP) application update
– Supports 512-byte single page erase
– Configurable data FLASH address and size in 128K-byte system, fixed to 4K-byte data in 32K-byte and 64K-byte systems
– Support 2-wire ICP upgrade via SWD/ICE interface
– Supports parallel high-speed programming mode of external programmer
• SRAM memory
– 4K/8K/16K bytes built-in SRAM
– Support PDMA mode
• PDMA (Peripheral DMA)
– Supports 9-channel PDMA for automatic data transfer of SRAM and peripherals
• Clock control
– Flexible clock selection for different applications
– Internal 22.1184 MHz high-speed oscillator for system operation
? Accuracy corrected to ± 1 % at +25 ℃, VDD = 5.0 V
? ± 3 % accuracy over -40 ℃ ~ +85 ℃ and VDD = 2.5 V ~ 5.5 V
– Internal low-power 10 KHz low-speed oscillator for watchdog and power-down mode wake-up functions
– Supports a set of PLLs, up to 50 MHz, for high-performance system operation
– External 4~24 MHz crystal input for USB and precise timing operation
– External 32.768 kHz crystal input for RTC and low power mode operation
– Four I/O modes:
? Quasi-bidirectional mode
? Push-Pull Output Mode
? Open-Drain Output Mode
? High impedance input mode
– TTL/Schmitt trigger input optional
– I/O pins can be configured as interrupt sources in edge/level sensitive mode
– Supports high current drive and sink I/O modes
• Timer
– Supports 4 sets of 32-bit timers, each timer has a 24-bit count-up timer and an 8-bit prescaler counter
– Each timer has an independent clock source
– Provides one-shot, periodic, toggle and continuous counting operation modes
– Support event counting function
– Support input capture function
• Watchdog Timer
– Multiple clock sources
– 8 selectable time-out periods from 1.6ms to 26.0sec (depending on selected clock source)
– WDT can be used as wake-up from power-down/sleep mode
– Interrupt/reset selection for watchdog timeout
– Support software frequency compensation function through frequency compensation register (FCR)
– Support RTC count (second, minute, hour) and perpetual calendar function (day, month, year)
– Support alarm register (second, minute, hour, day, month, year)
– Selectable as 12-hour or 24-hour
– Automatic leap year recognition
– Supports cycle time tick interrupts including 8 selectable cycles of 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second
– Support wake-up function
• PWM/Capture
– Built-in four 16-bit PWM generators, which can output 8-channel PWM or 4 sets of complementary paired PWM
– Each PWM generator is equipped with a clock source selector, a clock divider, an 8-bit clock prescaler and a dead-time generator for complementary paired PWM
– 8-channel 16-bit capture timer (shared PWM timer) provides 8-channel input rising/falling edge capture function
– Support capture (Capture) interrupt
– Up to three sets of UART controllers
– Support flow control (TXD, RXD, CTS and RTS)
– UART0 with 64-byte FIFO for high speed mode
– UART1/2 (optional) with 16-byte FIFO for standard mode
– Supports IrDA (SIR) and LIN functions
– Supports RS-485 9-bit mode and direction control
– Programmable baud rate generator frequency up to 1/16 system clock
– Support PDMA mode
– Support up to 4 groups of SPI controllers
– Master rate up to 32 MHz, slave up to 10 MHz (when the chip operates at 5V)
– Support SPI master/slave mode
– Full duplex synchronous serial data transmission
– Variable data length (from 1 bit to 32 bits) transfer mode
Configurable MSB or LSB first transfer mode
– Receive or transmit on the rising or falling edge of the clock is independently configurable
– 2 slave chip select lines when used as a master, 1 slave chip select line when used as a slave
– Support byte sleep mode in 32-bit transfer mode
– Support PDMA mode
– Two-way interface supporting three-wire no slave select signal
• I2C
– Supports up to 2 sets of I2C devices
– Master/Slave mode
– Bidirectional data transmission between master and slave
– Multi-master bus support (no central master)
– Arbitration of data transmission between multiple hosts at the same time to avoid serial data corruption on the bus
– The bus adopts serial synchronous clock, which can realize the transmission between devices at different rates
– The serial synchronization clock can be used as a handshake method to control the suspension and resumption of data transmission on the bus
– Programmable clock for different rate control
– Supports multiple address recognition on the I2C bus (4 slave addresses with mask option)
• I2S
– External audio CODEC interface
– Can be used as master or slave mode
– Can handle 8, 16, 24 and 32 bit words
– Supports mono and stereo audio data
– Supports I2S and most significant bit data formats
– Provides two sets of 8-word FIFO data buffers, one for sending and one for receiving
– An interrupt request is generated when the buffer exceeds a programmable boundary
– Supports two sets of DMA requests, one for transmit and one for receive
• CAN 2.0
– Support CAN 2.0A and 2.0B protocols
– Bit transfer rate up to 1M bit/s
– 32 message objects
– Each message object has its own identifier mask
– Programmable FIFO mode (link message object)
– Maskable interrupts
– Disable automatic retransmission mode in time-triggered CAN applications
– Support power-down mode wake-up function
• PS/2 device controller
– Disable Host communication and request to send detection
– Receive frame error detection
– Programmable 1 to 16 bytes transmit buffer to reduce CPU load
– Double buffering for data reception
– Software controllable bus
• USB 2.0 Full-Speed ​​Device
– A set of 12Mbps USB 2.0 FS devices
– On-chip integrated USB transceiver module
– Provides 1 set of interrupt sources and provides four interrupt events
Support control transfer (Control), bulk transfer (Bulk In/Out), interrupt transfer (Interrupt) and synchronous transfer
When there is no signal on the bus for 3ms, it has the function of automatic pause
– Support 6 groups of programmable endpoints (endpoints)
– 512 bytes of internal SRAM as USB buffer
– Support remote wake-up function
• Supports EBI (External Bus Interface) (100-pin and 64-pin Package Only)
– Accessible space: 64KB for 8-bit mode or 128KB for 16-bit mode
– Supports 8-bit/16-bit data width
– Byte write support in 16-bit data width mode
– 12-bit ADC with conversion rates up to 700K SPS
– Up to 8-channel single-ended mode input or 4-channel differential mode input
– Single Scan Mode/Single Cycle Scan Mode/Continuous Scan Mode
– Separate result registers for each channel
– Scan enable channel
– Threshold voltage detection
– Start conversion by software programming or external pin trigger
– Support PDMA mode
• Analog Comparator
– 2 sets of analog comparator modules
– Negative terminal potential can select external input or internal band gap voltage
– Change of comparison result can be used as interrupt trigger condition
– Support power-down mode wake-up function
• Built-in temperature sensor with 1°C resolution
• Brown-Out detector
– Supports four levels of detection voltage: 4.5 V/3.8 V/2.7 V/2.2 V
– Supports brown-out interrupt and reset selection
• Low voltage reset
– Threshold voltage: 2.0 V
• Working temperature: -40℃~85℃
• Package:
– Lead-free package (RoHS)
LQFP 100-pin / 64-pin / 48-pin
NuMicro™ NUC140 Connectivity Line Selection Guide
Nuvoton Technology NuMicro NUC140 MCU Development Solution
Nuvoton Technology NuMicro NUC140 MCU Development Solution
Figure 1. NuMicro™ NUC140 Block Diagram

NUC140VE3AN application:

Industrial Control

Data Communications

USB Applications

Consumer Products

Motor Control


NuTiny-SDK-NUC140 uses the NUC140VE3AN as the target microcontroller. Figure 2-1 is NuTiny-SDK-NUC140 for NUC140 series, the left portion is called NuTiny-EVB-NUC140 and the right portion is Debug Adaptor called Nu-Link-Me .

NuTiny-EVB-NUC140 is similar to other development boards. Users can use it to develop and verify applications to emulate the real behavior. The on board chip covers NUC140 series features. The NuTiny-EVB-NUC140 can be a real system controller to design users’ target systems.

Nu-Link-Me is a Debug Adaptor. The Nu-Link-Me Debug Adaptor connects your PC’s USB port to your target system (via Serial Wired Debug Port) and allows you to program and debug embedded programs on the target hardware. To use Nu-Link-Me Debug adaptor with IAR or Keil, please refer to “Nuvoton NuMicro™ IAR ICE driver user manual “or Nuvoton NuMicro™ Keil ICE driver user manual” in detail. These two documents will be stored in the local hard disk when the user installs each driver.
Nuvoton Technology NuMicro NUC140 MCU Development Solution
Figure 2. NuTiny-SDK-NUC140 Outline Drawing
Nuvoton Technology NuMicro NUC140 MCU Development Solution
Figure 3. NuTiny-SDK-NUC140 circuit diagram (1)
Nuvoton Technology NuMicro NUC140 MCU Development Solution
Figure 4. NuTiny-SDK-NUC140 circuit diagram (2)

NUC130/140 CAN Demo Board

A Controller-Area-Network (CAN)-Bus system enables device communication in harsh environments, found in industrial automation, military and automotive applications. As a multi-master system, each device (node) can obtain bus access through its unique priority code (address) and broadcasts messages to all bus participants simultaneously. The Nuvoton NuMicro Family NUC140/NUC130 series chips had offered the robustness of the CAN architecture which is licensed from Bosch.

Nuvoton Technology NuMicro NUC140 MCU Development Solution
Figure 5. NUC130/140 CAN Demo Board Outline Drawing

Main features of NUC130/140 CAN Demo Board:

Multi-Master : Every node can control motor speed

Hot plugging

Only two wires to connect CAN BUS

Far distance to transmit: 250m @250Kbps

Good at Anti-EMI

Good at extend system ability

High Reliability : CAN Bus has complete detect error method

NUC130/140 CAN Demo Board Application:

CAN BUS monitor

Car diagnostic system

Elevator control

Remote monitor about the strain of bridge

Digital Dashboard

Motor Control

This CAN-Bus demonstration kit simulates industrial and automotive control environments.

A System Monitor Node (Node 0 ) This node can be connected to an external PC through a USB interface. The PC/laptop controls the speed rate and shows the real time speed on the screen

A System Monitor Node (Node1) controls the motor speed up/down function

A System Monitor Node (Node2) controls the motor speed up/down function

A Motor Node (Node3) controls speed or start/stop of a stepper motor

Figure 6. NUC130/140 CAN Application Demonstration Diagram

For details, see:

The Links:   EP2C5F256C8N FF200R17KE4 GET PARTS