Keil’s MCB1000 evaluation board can be used to evaluate NXP’s ARM Cortex™-M0 and Cortex-M3 devices such as NXP LPC11xx and NXP LPC13xx series, with serial interface, CAN interface and USB 2.0 full-speed interface as well as Cortex download and debugging, And NXP’s LPC1110/11/12/13/14/15 is a low-cost 32-bit MCU based on ARM Cortex-M0, with a CPU operating frequency of up to 50MHz, which can be used for 8/16-bit MCU applications such as Electronic meters, lighting, Alarm system engineering and white goods. This article introduces the main features and advantages of LPC1110/11/12/13/14/15, the block diagram and the main features and technical data of the Keil MCB1000 evaluation board, block diagram and circuit diagram.

The LPC1110/11/12/13/14/15 are a ARM Cortex-M0 based, low-cost 32-bit MCU family, designed for 8/16-bit microcontroller applications, offering performance, low power, simple instruction set and memory addressing together with reduced code size compared to existing 8/16-bit architectures.

The LPC1110/11/12/13/14/15 operates at CPU frequencies of up to 50 MHz.

The peripheral complement of the LPC1110/11/12/13/14/15 includes up to 64 kB of flash memory, up to 8 kB of data memory, one Fast-mode Plus I2C-bus interface, one RS-485/EIA- 485 UART, up to two SPI interfaces with SSP features, four general purpose counter/timers, a 10-bit ADC, and up to 42 general purpose I/O pins.

Main features and advantages of LPC1110/11/12/13/14/15:

 System:

 ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.

 ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).

 Non-Maskable Interrupt (NMI) input selectable from several input sources (LPC1100XL series only).

 Serial Wire Debug.

 System tick timer.

 Memory:

 64 kB (LPC1115), 56 kB (LPC1114/333), 48 kB (LPC1114/323), 32 kB (LPC1114/102/201/202/203/301/302/303), 24 kB (LPC1113), 16 kB (LPC1112), 8 kB (LPC1111), or 4 kB (LPC1110) on-chip flash programming memory.

 256 byte page erase function (LPC1100XL series only)

 8 kB, 4 kB, 2 kB, or 1 kB SRAM.

 In-System Programming (ISP) and In-Application Programming (IAP) via on-chip bootloader software.

 Digital peripherals:

 Up to 42 General Purpose I/O (GPIO) pins with configurable pull-up/pull-down resistors. In addition, a configurable open-drain mode is supported on the

LPC1100L and LPC1100XL series.

 GPIO pins can be used as edge and level sensitive interrupt sources.

 High-current output driver (20 mA) on one pin.

 High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus (not on LPC1112FDH20/102).

 Four general purpose counter/timers with up to eight capture inputs and up to 13 match outputs.

 Programmable WatchDog Timer (WDT) the LPC1100 series only.

 Programmable windowed WDT on the LPC1100L and LPC1100XL series only.

 Analog peripherals:

 10-bit ADC with input multiplexing among 5, 6, or 8 pins depending on package size.

 Serial interfaces:

 UART with fractional baud rate generation, internal FIFO, and RS-485 support.

 Two SPI controllers with SSP features and with FIFO and multi-protocol capabilities (second SPI on LPC1100 and LPC1100L series LQFP48 package only).

 I2C-bus interface supporting full I2C-bus specification and Fast-mode Plus with a data rate of 1 Mbit/s with multiple address recognition and monitor mode (not on LPC1112FDH20/102).

 Clock generation:

 12 MHz internal RC oscillator trimmed to 1% accuracy that can optionally be used as a system clock.

 Crystal oscillator with an operating range of 1 MHz to 25 MHz.

 Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.

 PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator or the internal RC oscillator.

 Clock output function with divider that can reflect the system oscillator clock, IRC clock, CPU clock, and the Watchdog clock.

 Power control:

 Integrated PMU (Power Management Unit) to minimize power consumption during Sleep, Deep-sleep, and Deep power-down modes.

 Power profiles residing in boot ROM allowing to optimize performance and minimize power consumption for any given application through one simple function call. (LPC1100Land LPC1100XL series only.)

 Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.

 Processor wake-up from Deep-sleep mode via a dedicated start logic using up to 13 of the functional pins.

 Power-On Reset (POR).

 Brownout detect with four separate thresholds for interrupt and forced reset.

 Unique device serial number for identification.

 Single power supply (1.8 V to 3.6 V).

 Available as LQFP48 package and HVQFN33 package.

 LPC1100L series available as TSSOP28 package, DIP28 package, TSSOP20 package, and SO20 package.

LPC1110/11/12/13/14/15 Application:

eMetering 

Lighting

Alarm systems 

White goods

Figure 1. Block diagram of LPC1100/LPC1100L series

Figure 2. Block diagram of the LPC1100x series

Keil MCB1000 Evaluation Board

MCB1000: Evaluation Board and Starter Kit

The Keil MCB1000 Evaluation Boards enable you to create and test working programs based on the NXP family of ARM Cortex™-M0 and Cortex-M3 processor-based devices.

The Keil MCB1000 Evaluation Board allows you to generate and test application programs for the NXP LPC11xx and NXP LPC13xx device families. With this hands-on process, you can determine the hardware and software requirements for current and future product development.

This board is available in five configurations: the MCB11U10, the MCB1114, the MCB11C14, the MCB1313 and the MCB1343.

MCB1114 is populated with the NXP LPC1114FBD48/302 Cortex-M0 device

Figure 3. Outline drawing of Keil MCB1000 evaluation board

The Keil MCB1000 evaluation kit includes:

The MCB1000 Evaluation Board.

A µVision IDE Quick Start Guide.

An ARM Development Tools Overview.

A USB A to USB B cable.

The main features of the Keil MCB1000 evaluation board:

The MCB1000 evaluation board features the following easy access to many of the on-chip peripherals.

Serial Port

A standard DB9 connector provides an RS232 connection to the on-chip UART.

CAN Interface

Two standard DB9 connectors for applications requiring CAN communications (MCB11C14 board only). Your application may use either or both of these connectors for access to the on-chip CAN controller.

USB 2.0 Full Speed ​​Interface

A standard USB B connector for USB Device and USB Host (MCB1343 board only) applications.

Cortex Download and Debug

The MCB1000 board incorporates a Cortex Debug interface. When coupled with the ULINK2 USB-JTAG adapter, the Serial Wire Debug interface allows flash programming and debugging.

The hardware block diagram displays input, configuration, power system, and User I/O on the board. This visual presentation helps you to understand the MCB1000 board components.

Figure 4. Block diagram of Keil MCB1000 evaluation board

Main technical data of Keil MCB1000 evaluation board:

Figure 5. Keil MCB1000 evaluation board circuit diagram (1)

Figure 6. Circuit diagram of Keil MCB1000 evaluation board (2)

Figure 7. Keil MCB1000 evaluation board circuit diagram (3)
For details, see:
http://www.nxp.com/documents/data_sheet/LPC111X.pdf
and
http://www.keil.com/mcb1000/mcb1000-schematics.pdf

The Links:   LB150X03-TL04   2SC3318