Summary
This article will introduce you to a low-power LED lighting driver solution using TI’s off-line primary-side sensing controller TPS92310. This solution achieves high efficiency and good line and load regulation due to the constant on-time flyback topology and primary-side sensing control. For a GU10 replacement LED bulb, the reference design PMP4325 has a suitable small form factor (30mm x 18mm x 10mm), which supports common AC line input and 3 or 4 LED series output with a constant output current of 350mA. Experiments show that for LED lighting, the solution has good line and load regulation, high efficiency, and overall LED lighting protection.
1 Theoretical operation
1.1 TPS92310 Controller
The single-stage flyback structure is an attractive topology for LED lighting with lower power ratings. The single-stage flyback structure can be widely used in LED lighting for the following reasons:
. Galvanic isolation reduces overall bill of materials (BOM)
. High power factor using special control architecture (eg: constant on-time control, etc.)
. Smaller form factor compared to other two-stage topologies
Although the single-stage flyback structure has many advantages when used in LED lighting, there are still some problems to be solved. These questions include:
. High power factor
. Stable line and load regulation for primary side feedback (PSR)
. LED open circuit or short circuit protection
The TI TPS92310 controller is a single-stage primary-side sensing AC/DC controller for constant current driving high brightness LEDs. It operates in zero current detection transition mode (TM). During the line voltage half cycle, the “on time” (TON) is almost constant. Therefore, it has power factor correction (PFC) itself, because the peak current of the main winding changes with the input line voltage curve. to TON Adjustment is made to adjust the LED current to a preset level set by an external sense resistor. TON It is also used in the control design of flyback, boost and buck-boost converters. This converter operates in conversion mode and uses constant on-time control to achieve high power factor. In addition, TON It can also be used to control buck converters operating in conversion mode, whose general-purpose LED drivers use peak current control.
Primary side detection does not require optocouplers and secondary side circuitry, resulting in fewer components and a more compact PCB solution. In addition, the controller features cycle-by-cycle current limit, output short-circuit protection, output overvoltage protection (OVP) or open LED protection, shorted LED protection, and thermal shutdown protection, all of which provide protection for LED lighting measure.
1.2 Constant On-Time Control
In conventional boost power factor corrected converters, constant on-time controlled conversion mode is typically used to keep the input current in phase with the input voltage for high power factor and low total harmonic distortion (THD).
For a single-stage flyback topology operating in conversion mode, it is not inherently power factor correction because the duty cycle and frequency are constantly changing during the shape cycle. Therefore, under such conditions, power factor and total harmonic distortion are not ideal. Fortunately, the single-stage flyback topology operating in filtered mode uses a fixed (constant) TON, still achieve high power factor and low total harmonic distortion. As shown in Figure 1, the average input current is an approximate sine wave with the same phase as the input voltage.
Figure 1 TON and TOFF Period current waveform
In this design, the TPS92310 controller is configured in constant on-time control mode, and if a bulk capacitor is connected to the COMP pin to filter the 100-Hz line voltage ripple for single-stage flyback applications, the switching The turn-on time can be fixed. However, to reduce board size, the reference design is not a single-stage structure without power factor correction, so we used a small compensation capacitor just to keep the control loop stable. Since the DC input voltage of the flyback structure is relatively stable, this turn-on time is almost constant.
1.3 Constant current control with primary side detection
Accordingly, Figure 2 shows the primary current, secondary current and Vds Voltage, average output current Io is calculated as follows:
in:
2 × Tdly = half of the ringing time on the MOSFET drain
N = Transformer turns ratio of primary winding to secondary winding
Ip_pk= primary current
Is_pk= secondary current
Io= Average output current (LED current)
Figure 2 Current and Vds Voltage waveform
To regulate the output current, the converter uses a PWM control circuit, as shown in Figure 3. This circuit includes charge and discharge modes of operation. The charging working mode is determined by the internal reference current IREF × time (TON + TOFF + 2TDLY)control. The discharge operating mode is determined by TOFF switch and Ipk Current source control, which is proportional to the primary peak current. COMP voltage level can represent gate drive TON.
During normal operation, if the discharge Q(Ipk × TOFF) is greater than the charging Q (IREF × (TON + TOFF +2TDLY)), the COMP pin voltage drops, resulting in the gate output TON increase in the next cycle. In addition, if charging Q(IREF × (TON + TOFF + 2TDLY)) is greater than the discharge Q (Ipk ×TOFF), then VCOMP rising, the gate driver output TONincrease in the next cycle. If charging Q equals discharging Q, then VCOMPVoltage is stable. Therefore, when a bulk capacitor is connected to the COMP pin to filter the 100-HZ line ripple, a fixed on-time is produced at half a sine cycle, enabling power factor correction. A small capacitor can be used to connect the COMP pin when power factor correction is not used to maintain loop stability, and only for flyback topologies.
Figure 3 Charge and discharge block diagram
The controller implements primary current feedback and regulation to maintain a constant output LED current. Figure 4 shows the block diagram of the TPS92310 controller. The red dotted line represents a main control loop.
Figure 4 TPS92310 block diagram
1.4 ZCD detection, delay setting and output overvoltage
The Zero Cross Detect (ZCD) pin performs zero current detection on the transformer auxiliary winding. When ZCD voltage is below VZCD(TRIG) level, the internal RS flip-flop sends a ZCD signal to the IDLY delay block to trigger the next switching cycle. Double-layer detection (ARM/TRIG) on this pin ensures that the switching FET is “on” at zero current on the secondary side of the isolation transformer. Figure 5 shows a typical switching waveform for the “leakage” of a switching FET. The controller also provides a 300ns headroom for ZCD detection to avoid any possible ringing effects.
To reduce EMI and switching losses during converter operation, the TPS92310 controller uses a DLY pin. The delay timer can be easily controlled by connecting an external circuit resistor. Using this IDLY pin, the converter can ensure zero current in the transformer windings without having to “turn on” the main switching FET. The preset delay timer value must be considered based on the resonant frequency between the isolation transformer main winding inductance and the switching FET drain charging. Using the following equation, we can calculate Tdly:
(2)
in:
Lp= Transformer primary winding inductance
Coss=MOSFET output capacitor
Tdly used to control VCOMP the discharge time, so it must be set by an external circuit resistor connected to the DLY pin, as shown in Figure 6.
Figure 5 Typical switching waveform
Figure 6 Tdly set curve
The ZCD pin is also used for output overvoltage protection. The positive voltage on the auxiliary winding appears as the output LED voltage, which is detected by an external voltage divider resistor, as shown in Figure 7. Overvoltage on the ZCD pin exceeds the OVP threshold for 3 cycles. The drive output should be turned off and the controller implements restart mode. The OVP voltage is calculated as follows:
in:
Ns= number of auxiliary winding turns
Na= output winding turns
VD= forward voltage of the output rectifier
The negative voltage on the auxiliary winding represents the reflected voltage of the input voltage, therefore, when R is selectedU When , the power dissipation of the resistor needs to be considered. A current of 0.2mA to 0.5mA is suitable. Connect a diode to the ZCD pin to keep this negative voltage below 1V. We always connect a small capacitor C between the ZCD pin and GND in order to eliminate possible ringing effects, ensure accurate OVP, and achieve proper valley switch turn-on.
Figure 7 ZCD pin connection circuit
1.5 Output short circuit protection
The TPS92310 controller operates under voltage mode control and requires the use of cycle-by-cycle limiting for OCP and SCP. In this isolated flyback structure, the controller provides two constant on-time modes with different OCP thresholds (0.64V and 3.4V). Using the following equation, the detection voltage of the main current can be calculated:
in:
REF = 0.14 of the controller
Vled = 12V
VD = 0.8V
Vin_min = 127 Vdc
In this design, Vor is approximately equal to 85V, which is Nx(Vled +VD)
η=efficiency, estimated to be about 0.8 at low line voltage
For this traditional flyback design, Visns is about 0.53 V.
Since the Vin_min voltage is fixed and the Vor design voltage is also almost constant, Visns is almost constant when the LED voltages are different. The sense voltage is below the OCP threshold, so we can configure a constant on-time mode with a 0.64 V OCP threshold for excellent output short-circuit protection. This mode can be used in all conventional flyback designs. To avoid ringing interference from ZCD detection during output short circuit, a small capacitor must be connected between ZCD pin and GND to eliminate false ZCD detection. A 10-Pf capacitor is more suitable for this design. Figure 8 shows the output short circuit waveform.
Figure 8 Output Short Circuit Protection (SCP) Waveform
1.6 External line voltage adjustment compensation
Due to the propagation delay inherent in the controller, there are different peak currents at high and low line voltages, as shown in Figure 9. For the same propagation delay, a high line input voltage will produce a higher current differential than a low line input voltage. According to Equation 1, the input current sense error affects the LED current, resulting in poor line regulation. There are two ways to improve line regulation when the input voltage changes from low to high line voltage:
1. Add a fast shutdown circuit (as shown in Figure 10). It reduces the MOSFET switching delay and improves the 5 mA current tolerance at 230 Vac in this design.
2. Add an input voltage detection circuit (as shown in Figure 11) to shorten the turn-on time under high line voltage; achieve ideal high current accuracy by adjusting R17 to 110 Vac and 230 Vac line voltage. R19, R19 and R20 determine the inflection point of the LED current. Figure 12 shows the line turndown curve using external compensation.
Figure 9 Intrinsic propagation delay
Figure 10 Fast shutdown circuit
Figure 11 External line voltage adjustment compensation circuit
Figure 12 Line voltage adjustment compensation curve
2 Transformer Design
According to the previous description, to use an external SCP circuit, Visns must be set below 0.6V.
in:
Visns= Detection voltage of primary current (less than 0.6V if external SCP circuit is used, otherwise unlimited)
Rcs= current sense resistor
N = Transformer turns ratio between primary winding and output winding
IP= primary peak current
Vor= primary reflected voltage of secondary voltage
Iled=LED current
Vled=LED voltage
η = estimated power efficiency
VD= forward voltage of the output rectifier
Vin_min= minimum input DC voltage, typically simplified to 1.3 Vac_min
The transformer specification is calculated as follows:
in:
Lp = primary winding inductance
Np = number of primary turns
Nout = output winding turns
Naux = Auxiliary winding turns (usually less than calculated due to peak voltage effects)
DMAX = maximum duty cycle (calculated using Equation 2)
FS_MIN = Low line voltage sets the minimum switching frequency
△BMAX = select maximum working flux density
Ae = effective core area
Vaux = select VCCVoltage
VD_out = Forward voltage of auxiliary rectifier
Finally, we can choose the RMS current and peak voltage of the primary MOSFET, and then choose the MOSFET secondary rectifier, rectifier, and build transformer based on the RMS current and spool window.
3 Experimental results
3.1 Electrical Performance Specifications
Table 1 PMP4325 Electrical Specifications
3.2 Reference Design Schematic
Figure 13 PMP4325 reference design schematic
3.3 PMP4325 PCB Layout
Implemented on a double-sided PCB, the reference design is dimensionally compatible with GU10 LED lamps and similar applications. To meet different requirements, we provide two versions of PCB layout files:
1. There is no demo board for the release version that outputs the SCP line voltage regulation compensation circuit.
2. Specialized PCB files for some customers who require strong SCP and line voltage adjustment functions
Figure 14 Component side and solder side of the demo board
3.3.1PCB Layout without SCP and Line Regulation Compensation Circuit
Figure 15 PCB Layout of Release Demo Board
3.4 Electrical performance
Figures 16 through 18 show typical performance curves for the PMP4325 9-V and 12-V, 350-mA LED drivers.
3.4.1 3-LED and efficiency curves for 4-LED applications
Figure 16 Efficiency curves for 3-LED and 4-LED loads
3.4.2Line voltage regulation curve
Figure 17 Line voltage regulation of LED current
3.4.3Line Voltage Regulation Curve Using Compensation Circuit
Figure 18 LED current line voltage regulation using compensation circuit
3.4.4Start output waveform
Figure 19 110VAC start-up test Figure 20 230VAC start-up test
3.4.5Output Ripple Voltage vs Current
Figure 21 110VAC output ripple test Figure 22 230VAC output ripple test
3.4.6output overvoltageandOpen LED Protection
Figure 23 OVP test for 110VAC Figure 24 OVP test for 230VAC
3.4.7 2-LED Protect
Figure 25 Short circuit 2 LED test at 110VAC Figure 26 Short circuit 2 LED test at 230VAC
3.4.8Output short circuit protection
Figure 27 110VAC output short circuit test Figure 28 230VAC output short circuit test
3.5 Conducted Electromagnetic Interference (EMI)
3.5.1EMI of 4LED GU10 load with Y capacitor
Figure 29 Conducted EMI with powered 230VAC Figure 30 Conducted EMI with unpowered 230VAC
3.5.2EMI of 3-LED GU10 load with Y capacitor
Figure 31 Conducted EMI with powered 230VAC Figure 32 Conducted EMI with unpowered 230VAC
3.5.3EMI of 3-LED GU10 load without Y-capacitor
Figure 33 Conducted EMI with powered 230VAC Figure 34 Conducted EMI with unpowered 230VAC
3.6 Bill of Materials
Table 2 PMP4325 Bill of Materials
3.7 Transformer Specifications
This subsection describes the core and bobbin specifications, circuit diagrams, electrical specifications, and construction diagrams of the transformer.
Magnetic core: EPC13
Core material: PC40, or other similar materials
Spool: 10-pin horizontal spool, the specific dimensions are as follows:
Figure 35 10-Pin Horizontal Spool
Figure 36 Transformer circuit diagram
Table 3 Transformer Electrical Specifications
Figure 37 Transformer structural diagram
references
1. “TPS92310 Offline Primary Side Induction Controller” in TI PFC product manual
The Links: SKM200GB063D SEMIX453GB12VS